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C 64

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    Basic ROM
    Kernal ROM
    Char ROM
    CPU 6510
    VIC 6569
    SID 6581
    CIA 6526
    sonstige Ports

    Schematik 1
    Schematik 2

C 1541  Floppy

    Memory Map
    Rom Listing
    VIA 6522

C 1581  Floppy

    Memory Map
    Rom Listing
    CIA 8520
    WD 1772


    Mouse 1531
    Chip 74xx

MOS 6569   Video Interface Controller (VIC)

D000  Sprite O X Pos
D001Sprite O Y Pos
D002Sprite 1 X Pos
D003Sprite 1 Y Pos
D004Sprite 2 X Pos
D005Sprite 2 Y Pos
D006Sprite 3 X Pos
D007Sprite 3 Y Pos
D008Sprite 4 X Pos
D009Sprite 4 Y Pos
D00ASprite 5 X Pos
D00BSprite 5 Y Pos
D00CSprite 6 X Pos
D00DSprite 6 Y Pos
D00ESprite 7 X Pos
D00FSprite 7 Y Pos
D010Sprites 0-7 X Pos (msb of X coord.)
D011VIC Control Register
7   Raster Compare: (Bit 8)
6   Extended Color Text Mode 1 = Enable
5   Bit Map Mode. 1 = Enable
4   Blank Screen to Border Color: O = Blank
3   Select 24/25 Row Text Display: 1 = 25 Rows
2   Smooth Scroll to Y Dot-Position (0-7)
1   Smooth Scroll to Y Dot-Position (0-7)
0   Smooth Scroll to Y Dot-Position (0-7)
D012Read Raster / Write Raster Value for Compare IRQ
D013Light-Pen Latch X Pos
D014Light-Pen Latch Y Pos
D015Sprite display Enable: 1 = Enable
D016VIC Control Register
7   Unused
6   Unused
5   Always set this bit to 0 !!!
4   Multi-Color Mode: 1 = Enable (Text or Bit-Map)
3   Select 38/40 Column Text Display: 1 = 40 Cols
2   Smooth Scroll to X Pos
1   Smooth Scroll to X Pos
0   Smooth Scroll to X Pos
D017Sprites O-7 Expand 2x Vertical (Y)
D018VIC Memory Control Register
7-4   Video Matrix Base Address (inside VIC)
3-1   Character Dot-Data Base Address (inside VIC)
0     Select upper/lower Character Set
D019VIC Interrupt Flag Register (Bit = 1: IRQ Occurred)
7   Set on Any Enabled VIC IRQ Condition
3   Light-Pen Triggered IRQ Flag
2   Sprite to Sprite Collision IRQ Flag
1   Sprite to Background Collision IRQ Flag
0   Raster Compare IRQ Flag
D01AIRQ Mask Register: 1 = Interrupt Enabled
D01BSprite to Background Display Priority: 1 = Sprite
D01CSprites O-7 Multi-Color Mode Select: 1 = M.C.M.
D01DSprites 0-7 Expand 2x Horizontal (X)
D01ESprite to Sprite Collision Detect
D01FSprite to Background Collision Detect
D020Border Color
D021Background Color O
D022Background Color 1
D023Background Color 2
D024Background Color 3
D025Sprite Multi-Color Register 0
D026Sprite Multi-Color Register 1
D027Sprite O Color
D028Sprite 1 Color
D029Sprite 2 Color
D02ASprite 3 Color
D02BSprite 4 Color
D02CSprite 5 Color
D02DSprite 6 Color
D02ESprite 7 Color

Der MOS 6567 ist für die NTSC und der pin-kompatible MOS 6569 für PAL zuständig.


Pin 1-7D6-D0  I/O  Datenbus
Pin 8!IRQOInterrupt ReQuest
Pin 9LPILightPen
Pin 10!CSIChip Select: Bei HIGH wird der VIC vom Bus getrennt
Pin 11R/!WIRead/!Write: LOW=Register schreiben, HIGH=lesen
Pin 12BAOReaDY: Bei LOW wartet die CPU auf HIGH
Pin 13VddReference voltage: +12V DC
Pin 14ColorOColor output
Pin 15S/Lum  OSync/Lumimance output
Pin 16AECOAddress Enable Control
Pin 17ø 0Osystem clock output
Pin 18!RASORow Address Strobe
Pin 19!CASOCow Address Strobe
Pin 20GNDGround: Masse (0 V)
Pin 21ø colorIColor Clock: NTSC: 14.31818 MHz,PAL: 17.734472 MHz
Pin 22ø inIDOT CLOCK: NTSC: 8.18 MHz,PAL: 7.88 MHz
Pin 23A11I/OAdressbus Bit 11
Pin 24-29A0-A5/A8-A13  I/OMultiplexed video Address bus
Pin 30-34A6-A10I/OAdressbus: Bit 6-10
Pin 35-38  D11-D8I/OFarb-Ram Datenbus
Pin 39D7I/ODatenbus: Bit 7
Pin 40VccSecondary voltage: +5V DC

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VIC II Manual